At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications and targeting all the time the most advanced technology nodes. And get differentiated products to market in quickly with reduced risk.
Senior Analog Design Engineer
We are looking for a Senior Analog Design Engineer who will part of a SERDES high performance/high speed circuits development team, in particular, high demanded frequency clock generation with low noise, to address most advanced consumer 20Gbps protocols in the market.
Does this sound like a good role for you?
This role involves developing integer and fractional PLL circuits based on LC tank and Ring-Oscillator topologies, with low phase noise and low area and power consumption. You’d leverage your strong understanding of circuit simulation and circuit layout as well as knowledge of CMOS and RF circuitries, Phase-Detector, Charge-Pump. DLL and VCO architectures.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.