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We are looking for SoC Implementation (Synthesis & STA) Engineer to SoC DU organization
We are looking for an engineer interested in SoC Hard Macro & top-level implementation activities. An engineer who is willing to do SoC implementation activities and capable to use the needed tools. A 6+ years of SOC/FPGA implementation experience is expected. In addition, any experience with SoC/FPGA/IP development is considered as an advantage.
You have a hungry mind to learn more and you are excited doing a variety of different kinds of tasks as part of your job. You are always ready to share your knowledge and skills among the people you work with. You are a team worker but also efficient on independent tasks, and your English language skills allow you communicate efficiently in our multicultural environment.
Main Responsibility Area
Basic requirements for implementation specialist are very good understanding and practical experience of synthesis, STA, timing closure and formal verification. The precise job description of the main tasks can be tailored based on your interest and experience.
• Participate in outlining System-on-Chip top-level activities
• Work with various design groups across different disciplines (RTL design, verification, DFT & layout) to meet timing closure, area, power, and performance requirements.
• Perform logic synthesis, logic equivalence checking, static timing analysis, power estimation and hand-off checks using best-in-class methodologies
• Analyze log and report files to ensure the tools are getting the required results.
• Develop the scripts to get the required results within the scheduled milestones
• Advising RTL designers and junior implementation designers related to constraints, timing closure & vendor requirements
• Bachelor’s or Master’s Degree in Engineering or equivalent
• 6+ years working experience in FPGA/ASIC/SoC development
• Familiar with digital design and UNIX/LINUX environment
• Knowledge of ARM standards, processors and interconnects
• Good understanding of RTL design and RTL requirements for synthesis
• Good experience of scripting languages like TCL, Python, Perl
• Good knowledge of SoC (ASIC/FPGA) implementation tools
• Understanding of Cellular networks and 2G, 3G, LTE and 5G technology
• Fluent spoken and written English
• Low power understanding
• Experience of DFT, P&R or floorplanning
• Knowhow of packages, thermal, testing, product engineering